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SILProof / Knowledge / PFDavg
Quantitative gate · IEC 61508 / IEC 61511

PFDavg

Average probability that a low-demand safety function fails when a demand occurs. This page is the calculation basis. Target SIL still comes from risk analysis. Claimed SIL still needs architecture and systematic capability.

PFDavg is the time-averaged probability of failure on demand for a low-demand Safety Instrumented Function. It is not a high-demand or continuous-mode metric. Those use PFH (dangerous failures per hour).

Low-demand SIL bands

IEC 61508-style bands used in SILProof for the quantitative gate:

SILPFDavgApprox. RRF = 1/PFDavg
SIL 1≥ 10−2 to < 10−1> 10 to ≤ 100
SIL 2≥ 10−3 to < 10−2> 100 to ≤ 1,000
SIL 3≥ 10−4 to < 10−3> 1,000 to ≤ 10,000
SIL 4≥ 10−5 to < 10−4> 10,000 to ≤ 100,000

A value exactly on a band edge follows the inequality of the standard, not a rounded SIL label. Keep the calculated number.

What SILProof actually computes

SIL verification offers two low-demand engines. Neither is IEC 61508-6 tCE closed form, and neither is a certificate.

Algebraic

q = λDU × [PTC·min(PTI, MT) + (1−PTC)·MT] / 2 + λDD × MTTR

Channel mean unavailability q is then voted with a beta-factor CCF split. Identical channels use a binomial form. The loop PFD is the sum of sensor, logic and final-element subsystem PFDs. RRF = 1 / PFDavg for low demand only.

Markov

A continuous-time Markov chain with a periodic proof-test map. Dangerous occupancy is averaged over the proof-test interval after the cycle has converged. If PTC < 1, residual dangerous-undetected exposure is averaged over mission time. Engineering support — not a certification claim.

Assumptions that move the number: λDU / λDD source and units (FIT), PTI, PTC, mission time, MTTR, β on redundant channels, and voting. Empty λDU is not taken as zero.

PFDavg is one gate

A PFDavg in the SIL 2 band does not make the SIF SIL 2. Hardware architecture (Route 1H, Route 2H or IEC 61511 Table 6) and systematic capability still have to support the claim. That is the three-gate rule.

The PFD calculator is a 1oo1 screening estimate. SIL verification is the complete SIF (sensor, logic, final elements, architecture, SC).

Read next
  1. The Three Gates to SIL — why the weakest gate governs.
  2. Route 1H — SFF and HFT tables.
  3. PFD calculator — run λDU and PTI.